H. H. Tan, N. Ahmad, R. Ngadengon, P. Y. Y. Sia, and A. E. R. Muthu, “FPGA-Based Design for Digital Speedometer to Detect Speed Limit of Vehicles”, J. Adv. Res. Appl. Mech., vol. 127, no. 1, pp. 183–200, Nov. 2024.