Jia Yang Hor, Chia Yee Ooi and Soon Chieh Lim (2023) “Register Transfer Level Design of 32-Bit RISC-V Out-of-Order Processor”, Semarak Engineering Journal, 2(1), pp. 1–7. Available at: https://semarakilmu.com.my/journals/index.php/sem_eng/article/view/6225 (Accessed: 22 December 2024).