Jia Yang Hor, Chia Yee Ooi, Soon Chieh Lim. Register Transfer Level Design of 32-Bit RISC-V Out-of-Order Processor. Sem. Eng. J. [Internet]. 2023 Dec. 18 [cited 2024 Dec. 22];2(1):1-7. Available from: https://semarakilmu.com.my/journals/index.php/sem_eng/article/view/6225