A Modular Reconfigurable ADC for Multiplexed Industrial Sensor Fusion Applications Using the Coarse-Fine Methodology

Abstract

This paper presents a reconfigurable ADC that converts more than one analogue signal into digital output bits with reconfigurable resolution. The proposed reconfigurable ADC uses successive approximation register technique (SAR) that provides low power consumption and small chip area. The proposed technique is applied on multiplexed sensor fusion that has many applications in biosensors, automotive sensors and sensors of weather stations. The main idea of this work is to apply the reconfigurability concept of a SAR ADC. The advantage of this design is converting three analogue signals (as a case study) to 4, 8 and 12 digital output bits by using only one modular reconfigurable ADC. By applying the reconfigurability concept we can save area and power consumption. This idea is achieved by enabling and disabling of one or more stages of the ADC according to the required analogue signal to be converted. In this paper three analogue signals used in a weather station are converted into digital output as a case study. These signals are temperature, pressure and humidity and are sensed using BME-280 Bosch sensor. The proposed ADC uses the coarse-fine conversion technique for its high accuracy and low power consumption. Simulation is carried out using Cadence Virtuoso with hardware-calibrated TSMC 65 nm CMOS technology. All metrics of the ADC are measured such as ENOB, SNR, Power consumption, INL, DNL, FOM and Chip area for each reconfigured number of bits (4, 8 and 12-bits in this case study) using a supply voltage of 1.0 V and a sampling frequency of 100 kHz. The 12-bit resolution consumes 6.13 µW, ENOB is 11.13 bits, SNR equals 70.74 dB, SFDR equals 73.22 dB and FOM 0.45 fJ. mm2/conversion. The 8-bit resolution consumes 4.95 µW, ENOB is 7.37 bits, SNR equals 48.10 dB, SFDR equals 56.92 dB and FOM 5.72 fJ.mm2/conversion. The 4-bit resolution consumes 1.91 µW, ENOB is 3.67 bits, SNR equals 23.78 dB, SFDR equals 30.25 dB and FOM 29.03 fJ.mm2/conversion. The total chip area is 0.02 mm2. It has been shown that the proposed reconfigurable ADC can be used with different sensors with different resolutions given its modular architecture using the coarse-fine methodology.